ARM: Break up condition codes into normal flags, saturation, and simd.
authorAli Saidi <Ali.Saidi@ARM.com>
Fri, 13 May 2011 22:27:01 +0000 (17:27 -0500)
committerAli Saidi <Ali.Saidi@ARM.com>
Fri, 13 May 2011 22:27:01 +0000 (17:27 -0500)
commit2178859b76bb13b1d225fc4dffa04d43d2db2e14
treec57a005891e10565c9e7552cb90037a667001807
parent4bf48a11efd7253bdb7a61da42d2bc754033757b
ARM: Break up condition codes into normal flags, saturation, and simd.

This change splits out the condcodes from being one monolithic register
into three blocks that are updated independently. This allows CPUs
to not have to do RMW operations on the flags registers for instructions
that don't write all flags.
16 files changed:
src/arch/arm/faults.cc
src/arch/arm/intregs.hh
src/arch/arm/isa/formats/fp.isa
src/arch/arm/isa/formats/pred.isa
src/arch/arm/isa/insts/data.isa
src/arch/arm/isa/insts/fp.isa
src/arch/arm/isa/insts/ldr.isa
src/arch/arm/isa/insts/macromem.isa
src/arch/arm/isa/insts/mem.isa
src/arch/arm/isa/insts/misc.isa
src/arch/arm/isa/insts/mult.isa
src/arch/arm/isa/insts/str.isa
src/arch/arm/isa/operands.isa
src/arch/arm/isa/templates/pred.isa
src/arch/arm/miscregs.hh
src/arch/arm/nativetrace.cc