broadcom/vc5: Use the new LDVPM/STVPM opcodes on V3D 4.1.
authorEric Anholt <eric@anholt.net>
Thu, 4 Jan 2018 23:35:28 +0000 (15:35 -0800)
committerEric Anholt <eric@anholt.net>
Sat, 13 Jan 2018 05:54:33 +0000 (21:54 -0800)
commit22a02f3e344d6bc47e3e30949a36d00a9eae84a9
tree632ed61f4bee7c932baf6383d256c4ec304994cd
parent55f8a01acae7c4171ccfef301e48dc3cc67f5836
broadcom/vc5: Use the new LDVPM/STVPM opcodes on V3D 4.1.

Now, instead of a magic write register for VPM stores we have an
instruction to do them (which means no packing of other ALU ops into it),
with the ability to reorder the VPM stores due to the offset being baked
into the instruction.

VPM loads also gain the ability to be reordered by packing the row into
the A argument.  They also no longer write to the r3 accumulator, and
instead must be stored to a physical register.
src/broadcom/compiler/nir_to_vir.c
src/broadcom/compiler/qpu_schedule.c
src/broadcom/compiler/v3d_compiler.h
src/broadcom/compiler/vir.c
src/broadcom/compiler/vir_register_allocate.c
src/broadcom/qpu/qpu_instr.c
src/broadcom/qpu/qpu_instr.h
src/broadcom/qpu/qpu_pack.c
src/broadcom/qpu/tests/qpu_disasm.c