aarch64.md (<optab>_trunc><vf><GPI:mode>2): New pattern.
authorMichael Collison <michael.collison@arm.com>
Fri, 27 Oct 2017 06:05:58 +0000 (06:05 +0000)
committerMichael Collison <collison@gcc.gnu.org>
Fri, 27 Oct 2017 06:05:58 +0000 (06:05 +0000)
commit22be0d084c010c8c798f397d628759d259b15a92
tree8064bf46ae9e6631cad0fde860c06b6f09e943f9
parentacec245b359e4bb75f3ee635b2d367c84554860e
aarch64.md (<optab>_trunc><vf><GPI:mode>2): New pattern.

2017-10-26  Michael Collison  <michael.collison@arm.com>

* config/aarch64/aarch64.md(<optab>_trunc><vf><GPI:mode>2):
New pattern.
(<optab>_trunchf<GPI:mode>2: New pattern.
(<optab>_trunc<vgp><GPI:mode>2: New pattern.
* config/aarch64/iterators.md (wv): New mode attribute.
(vf, VF): New mode attributes.
(vgp, VGP): New mode attributes.
(s): Update attribute with SImode and DImode prefixes.
* testsuite/gcc.target/aarch64/fix_trunc1.c: New testcase.
* testsuite/gcc.target/aarch64/vect-vcvt.c: Fix scan-assembler
directives to allow float or integer destination registers for
fcvtz[su].

From-SVN: r254133
gcc/ChangeLog
gcc/config/aarch64/aarch64.md
gcc/config/aarch64/iterators.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/aarch64/fix_trunc1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/aarch64/vect-vcvt.c