misc: Remove redundant compiler-specific defines
authorAndreas Hansson <andreas.hansson@arm.com>
Mon, 12 Oct 2015 08:07:59 +0000 (04:07 -0400)
committerAndreas Hansson <andreas.hansson@arm.com>
Mon, 12 Oct 2015 08:07:59 +0000 (04:07 -0400)
commit22c04190c607b9360d9a23548f8a54e83cf0e74a
tree576135962e3c9c725157b461c8009b05933bba2b
parent735c4a87665119a33443cf8d191d329c66191c6e
misc: Remove redundant compiler-specific defines

This patch moves away from using M5_ATTR_OVERRIDE and the m5::hashmap
(and similar) abstractions, as these are no longer needed with gcc 4.7
and clang 3.1 as minimum compiler versions.
168 files changed:
src/arch/alpha/isa.hh
src/arch/alpha/kernel_stats.hh
src/arch/alpha/pagetable.hh
src/arch/alpha/process.hh
src/arch/alpha/system.hh
src/arch/alpha/tlb.hh
src/arch/arm/isa_device.hh
src/arch/arm/kvm/armv8_cpu.hh
src/arch/arm/kvm/base_cpu.hh
src/arch/arm/kvm/gic.hh
src/arch/arm/pagetable.hh
src/arch/arm/pmu.hh
src/arch/arm/table_walker.hh
src/arch/arm/tlb.hh
src/arch/arm/types.hh
src/arch/generic/types.hh
src/arch/mips/interrupts.hh
src/arch/mips/tlb.hh
src/arch/power/tlb.hh
src/arch/power/types.hh
src/arch/sparc/interrupts.hh
src/arch/sparc/isa.hh
src/arch/sparc/system.hh
src/arch/sparc/tlb.hh
src/arch/x86/decoder.hh
src/arch/x86/interrupts.hh
src/arch/x86/isa.hh
src/arch/x86/pagetable.hh
src/arch/x86/regs/msr.hh
src/arch/x86/tlb.hh
src/arch/x86/types.hh
src/arch/x86/utility.hh
src/base/compiler.hh
src/base/cp_annotate.hh
src/base/framebuffer.hh
src/base/hashmap.hh [deleted file]
src/base/inifile.hh
src/base/pollevent.hh
src/base/random.hh
src/base/trace.hh
src/base/vnc/vncserver.hh
src/cpu/base.hh
src/cpu/checker/cpu.hh
src/cpu/decode_cache.hh
src/cpu/inst_pb_trace.hh
src/cpu/kvm/base.hh
src/cpu/kvm/x86_cpu.hh
src/cpu/minor/cpu.hh
src/cpu/minor/pipeline.hh
src/cpu/o3/cpu.hh
src/cpu/o3/lsq_unit.hh
src/cpu/o3/mem_dep_unit.hh
src/cpu/o3/thread_state.hh
src/cpu/pred/bpred_unit.hh
src/cpu/simple/atomic.hh
src/cpu/simple/base.hh
src/cpu/simple/exec_context.hh
src/cpu/simple/probes/simpoint.hh
src/cpu/simple/timing.hh
src/cpu/simple_thread.hh
src/cpu/testers/rubytest/CheckTable.cc
src/cpu/testers/rubytest/CheckTable.hh
src/cpu/testers/traffic_gen/traffic_gen.hh
src/cpu/thread_state.hh
src/dev/alpha/backdoor.hh
src/dev/alpha/tsunami.hh
src/dev/alpha/tsunami_cchip.hh
src/dev/alpha/tsunami_io.hh
src/dev/alpha/tsunami_pchip.hh
src/dev/arm/energy_ctrl.hh
src/dev/arm/flash_device.hh
src/dev/arm/generic_timer.hh
src/dev/arm/gic_pl390.hh
src/dev/arm/gpu_nomali.hh
src/dev/arm/hdlcd.hh
src/dev/arm/kmi.hh
src/dev/arm/pl011.hh
src/dev/arm/pl111.hh
src/dev/arm/rtc_pl031.hh
src/dev/arm/rv_ctrl.hh
src/dev/arm/timer_cpulocal.hh
src/dev/arm/timer_sp804.hh
src/dev/arm/ufs_device.hh
src/dev/arm/vgic.hh
src/dev/copy_engine.hh
src/dev/copy_engine_defs.hh
src/dev/disk_image.hh
src/dev/dma_device.hh
src/dev/etherlink.hh
src/dev/ethertap.hh
src/dev/i2cbus.hh
src/dev/i8254xGBe.hh
src/dev/i8254xGBe_defs.hh
src/dev/ide_ctrl.hh
src/dev/ide_disk.hh
src/dev/mips/malta.hh
src/dev/mips/malta_cchip.hh
src/dev/mips/malta_io.hh
src/dev/mips/malta_pchip.hh
src/dev/multi_etherlink.hh
src/dev/multi_iface.hh
src/dev/ns_gige.hh
src/dev/pcidev.hh
src/dev/pixelpump.hh
src/dev/sinic.hh
src/dev/sparc/dtod.hh
src/dev/sparc/iob.hh
src/dev/sparc/mm_disk.hh
src/dev/tcp_iface.hh
src/dev/uart8250.hh
src/dev/virtio/base.hh
src/dev/virtio/fs9p.hh
src/dev/x86/cmos.hh
src/dev/x86/i8042.hh
src/dev/x86/i82094aa.hh
src/dev/x86/i8237.hh
src/dev/x86/i8254.hh
src/dev/x86/i8259.hh
src/dev/x86/speaker.hh
src/kern/kernel_stats.hh
src/mem/cache/cache.hh
src/mem/cache/mshr_queue.hh
src/mem/cache/prefetch/stride.hh
src/mem/cache/tags/base_set_assoc.hh
src/mem/cache/tags/fa_lru.hh
src/mem/coherent_xbar.hh
src/mem/comm_monitor.hh
src/mem/dram_ctrl.hh
src/mem/dramsim2.hh
src/mem/mem_checker.hh
src/mem/multi_level_page_table.hh
src/mem/packet_queue.hh
src/mem/page_table.hh
src/mem/physical.hh
src/mem/probes/base.hh
src/mem/probes/mem_trace.hh
src/mem/probes/stack_dist.hh
src/mem/ruby/common/Address.hh
src/mem/ruby/profiler/AddressProfiler.hh
src/mem/ruby/profiler/Profiler.hh
src/mem/ruby/structures/CacheMemory.cc
src/mem/ruby/structures/CacheMemory.hh
src/mem/ruby/structures/PerfectCacheMemory.hh
src/mem/ruby/structures/PersistentTable.hh
src/mem/ruby/structures/RubyMemoryControl.hh
src/mem/ruby/structures/TBETable.hh
src/mem/ruby/system/CacheRecorder.hh
src/mem/ruby/system/DMASequencer.hh
src/mem/ruby/system/RubyPort.hh
src/mem/ruby/system/RubySystem.hh
src/mem/ruby/system/Sequencer.cc
src/mem/ruby/system/Sequencer.hh
src/mem/simple_mem.hh
src/mem/snoop_filter.hh
src/mem/xbar.hh
src/sim/clock_domain.hh
src/sim/dvfs_handler.hh
src/sim/eventq.cc
src/sim/eventq.hh
src/sim/fd_entry.hh
src/sim/process.hh
src/sim/root.hh
src/sim/serialize.cc
src/sim/sim_events.hh
src/sim/sim_object.hh
src/sim/system.hh
src/sim/ticked_object.hh
src/sim/voltage_domain.hh