radeonsi: Enable VGPR spilling for all shader types v5
authorTom Stellard <thomas.stellard@amd.com>
Wed, 10 Dec 2014 14:13:59 +0000 (09:13 -0500)
committerTom Stellard <thomas.stellard@amd.com>
Wed, 28 Jan 2015 21:03:47 +0000 (21:03 +0000)
commit2397a721291457c146c7f4bcd48adcb3b2d979bd
tree016628c1fb29de41f0bbca307fa26eac43ae60dd
parent5dcd97f25c217450c9e3e0441246187219a01eca
radeonsi: Enable VGPR spilling for all shader types v5

v2:
  - Only emit write SPI_TMPRING_SIZE once per packet.
  - Use context global scratch buffer.

v3:
  - Patch shaders using WRITE_DATA packet instead of map/unmap.
  - Emit ICACHE_FLUSH, CS_PARTIAL_FLUSH, PS_PARTIAL_FLUSH, and
    VS_PARTIAL_FLUSH when patching shaders.

v4:
  - Code cleanups.
  - Remove unnecessary multiplies.

v5:
  - Patch shaders in system memory and re-upload to vram.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
src/gallium/drivers/radeonsi/si_compute.c
src/gallium/drivers/radeonsi/si_hw_context.c
src/gallium/drivers/radeonsi/si_pipe.c
src/gallium/drivers/radeonsi/si_pipe.h
src/gallium/drivers/radeonsi/si_shader.c
src/gallium/drivers/radeonsi/si_shader.h
src/gallium/drivers/radeonsi/si_state_draw.c
src/gallium/drivers/radeonsi/si_state_shaders.c