intel/compiler: Use new Gen11 headerless RT writes for MRT cases
authorKenneth Graunke <kenneth@whitecape.org>
Sat, 24 Aug 2019 01:23:32 +0000 (18:23 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Tue, 27 Aug 2019 21:20:07 +0000 (14:20 -0700)
commit23f42f8dcfe7ca275ff3cbb5586b5a07ce8df778
treead1e9cb813af08bae0a04e90a46eec269e7dacbc
parent0d96484165a42f95d2a894f7cfb9888674f45ce8
intel/compiler: Use new Gen11 headerless RT writes for MRT cases

Gen11 adds support for specifying the render target index and src0
alpha present bits in the extended message descriptor.  Previously,
we had to use a message header for this, requiring extra instructions
to write the fields, and two registers of extra payload.

Improves performance on my ICL 8x8 frequency locked to 700Mhz, on iris:

   GfxBench5 Manhattan 3.0: 2.13635% +/- 0.159859% (n=5)
   GfxBench5 Aztec Ruins:   1.57173% +/- 0.128749% (n=5)
   Synmark2 OglDeferred:    2.86914% +/- 0.191211% (n=10)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
src/intel/compiler/brw_fs.cpp