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(parent: 3f8bcb0) | patch
i965: Add support for the instruction compression bits on gen6.
authorEric Anholt <eric@anholt.net>
Fri, 3 Dec 2010 19:49:29 +0000 (11:49 -0800)
committerEric Anholt <eric@anholt.net>
Mon, 6 Dec 2010 08:14:23 +0000 (00:14 -0800)
commit245662f3083795e272fe9ef5d4cbeb6d048cf0e5
tree494fafc8c656d1f8c36612fa353a536cbdbc889etree
parent3f8bcb0d998820594ea288e4607462fa4479859fcommit | diff
i965: Add support for the instruction compression bits on gen6.

Since the 8-wide first-quarter and 16-wide first-half have the same
bit encoding, we now need to track "do you want instruction
compression" in the compile state.
src/mesa/drivers/dri/i965/brw_defines.h diff | blob | history
src/mesa/drivers/dri/i965/brw_eu.c diff | blob | history
src/mesa/drivers/dri/i965/brw_eu.h diff | blob | history
src/mesa/drivers/dri/i965/brw_eu_emit.c diff | blob | history