re PR target/31361 (SSE2 generation bug with shifts)

re PR target/31361 (SSE2 generation bug with shifts)

        PR target/31361
        * config/i386/i386.c (IX86_BUILTIN_PSLLDQ128, IX86_BUILTIN_PSLLW128,
        IX86_BUILTIN_PSLLD128, IX86_BUILTIN_PSLLQ128, IX86_BUILTIN_PSRAW128,
        IX86_BUILTIN_PSRAD128, IX86_BUILTIN_PSRLW128, IX86_BUILTIN_PSRLD128,
        IX86_BUILTIN_PSRLQ128): New.
        (ix86_init_mmx_sse_builtins): Add them.
        (ix86_expand_builtin): Expand them.
        * config/i386/sse.md (ashr<mode>3, lshr<mode>3, ashl<mode>3): Make
        operand 2 be TImode.
        * config/i386/emmintrin.h (_mm_slli_epi64, _mm_srai_epi16,
        _mm_srai_epi32, _mm_srli_epi16, _mm_srli_epi32,
        _mm_srli_epi64): Mark __B const.
        (_mm_srli_si128, _mm_srli_si128): Fix disabled inline versions.
        (_mm_sll_epi16, _mm_sll_epi32, _mm_sll_epi64, _mm_sra_epi16,
        _mm_sra_epi32, _mm_srl_epi16, _mm_srl_epi32, _mm_srl_epi64): Use
        new two-vector shift builtins.

From-SVN: r123250