RISC-V: Add support for the Zvksh ISA extension
authorChristoph Müllner <christoph.muellner@vrull.eu>
Fri, 30 Jun 2023 20:44:05 +0000 (22:44 +0200)
committerJeff Law <jlaw@ventanamicro>
Sat, 1 Jul 2023 13:28:40 +0000 (07:28 -0600)
commit259a2647dc158e196e4e03719cdc6bb0ff657d1d
treed073c6e8df285c0896cdf74c0c7cc12a87fbe21b
parent5ec6edd0a215651c4d20984b48095941167e2c0a
RISC-V: Add support for the Zvksh ISA extension

Zvksh is part of the vector crypto extensions.

This extension adds the following instructions:
- vsm3me.vv
- vsm3c.vi

bfd/ChangeLog:

* elfxx-riscv.c (riscv_multi_subset_supports): Add instruction
class support for Zvksh.
(riscv_multi_subset_supports_ext): Likewise.

gas/ChangeLog:

* testsuite/gas/riscv/zvksh.d: New test.
* testsuite/gas/riscv/zvksh.s: New test.

include/ChangeLog:

* opcode/riscv-opc.h (MATCH_VSM3C_VI): New.
(MASK_VSM3C_VI): New.
(MATCH_VSM3ME_VV): New.
(MASK_VSM3ME_VV): New.
(DECLARE_INSN): New.
* opcode/riscv.h (enum riscv_insn_class): Add instruction class
support for Zvksh.

opcodes/ChangeLog:

* riscv-opc.c: Add Zvksh instructions.

Signed-off-by: Nathan Huckleberry <nhuck@google.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
bfd/elfxx-riscv.c
gas/testsuite/gas/riscv/zvksh.d [new file with mode: 0644]
gas/testsuite/gas/riscv/zvksh.s [new file with mode: 0644]
include/opcode/riscv-opc.h
include/opcode/riscv.h
opcodes/riscv-opc.c