power shuffle, split SDRAM
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 10 Jun 2021 11:30:37 +0000 (12:30 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 10 Jun 2021 11:30:37 +0000 (12:30 +0100)
commit25ba82d03178c4d8c1712517224dcd0745f230d7
treea763bd544719a512e30d39962ef80b14b53d932b
parent35c460ab510e34d4f8c56c09f1b3bf243e97bf03
power shuffle, split SDRAM
180nm_Oct2020/ls180.mdwn