Tweak the pipeline model for Exynos M1
authorEvandro Menezes <e.menezes@samsung.com>
Tue, 23 Feb 2016 21:31:00 +0000 (21:31 +0000)
committerEvandro Menezes <evandro@gcc.gnu.org>
Tue, 23 Feb 2016 21:31:00 +0000 (21:31 +0000)
commit25cc21998e546c9a84df754d428c61f79bd89cd6
treecc8beb0576b099b68cd5e9154893694b0148b9ed
parent220ab1cced23295cb3f090865117edeb52d39416
Tweak the pipeline model for Exynos M1

gcc/
* config/aarch64/aarch64.c (exynosm1_tunings): Enable fusion of AES{D,E}
and AESMC pairs.
* config/arm/exynos-m1.md: Change cost of STP, fix bypass for stores
and add bypass for AES{D,E} and AESMC pairs.

From-SVN: r233647
gcc/ChangeLog
gcc/config/aarch64/aarch64.c
gcc/config/arm/exynos-m1.md