projects / litex.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: fb7864c) | patch
add hack to generate verilog with AsyncResetSynchronizer (FIXME)
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Fri, 23 Jan 2015 00:30:01 +0000 (01:30 +0100)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Fri, 23 Jan 2015 02:18:25 +0000 (03:18 +0100)
commit261469814ff372f75901efcb7fdde378fe3166ad
treed8555b623a3e09a64a68f9eb090e4da0e3f02462tree
parentfb7864c2b98b414310ead8cd361ee06f6399b3b4commit | diff
add hack to generate verilog with AsyncResetSynchronizer (FIXME)
litesata-version.txt [deleted file] blob | history
litescope-version.txt [new file with mode: 0644] blob
litescope/frontend/la.py diff | blob | history
make.py diff | blob | history