mem: Clarification of packet crossbar timings
authorMarco Balboni <Marco.Balboni@ARM.com>
Wed, 11 Feb 2015 15:23:47 +0000 (10:23 -0500)
committerMarco Balboni <Marco.Balboni@ARM.com>
Wed, 11 Feb 2015 15:23:47 +0000 (10:23 -0500)
commit268d9e59c5e69a00456a40c837b0150a8f3f6bf8
treeabb89f1dcd542109c163b76fb632ee8e5444ab18
parente2828587b3f28c4f37f0fe598209290bc3d41de0
mem: Clarification of packet crossbar timings

This patch clarifies the packet timings annotated
when going through a crossbar.

The old 'firstWordDelay' is replaced by 'headerDelay' that represents
the delay associated to the delivery of the header of the packet.

The old 'lastWordDelay' is replaced by 'payloadDelay' that represents
the delay needed to processing the payload of the packet.

For now the uses and values remain identical. However, going forward
the payloadDelay will be additive, and not include the
headerDelay. Follow-on patches will make the headerDelay capture the
pipeline latency incurred in the crossbar, whereas the payloadDelay
will capture the additional serialisation delay.
15 files changed:
src/arch/x86/pagetable_walker.cc
src/dev/io_device.cc
src/dev/pcidev.cc
src/dev/x86/intdev.hh
src/mem/bridge.cc
src/mem/cache/cache_impl.hh
src/mem/coherent_xbar.cc
src/mem/dram_ctrl.cc
src/mem/dramsim2.cc
src/mem/external_slave.cc
src/mem/noncoherent_xbar.cc
src/mem/packet.hh
src/mem/simple_mem.cc
src/mem/xbar.cc
src/mem/xbar.hh