Fix bugs in aarch64-ravenscar-thread.c
We found a few bugs in aarch64-ravenscar-thread.c.
First, some of the register offsets were incorrect. The "bb-runtimes"
file for this runtime had the wrong offsets in comments, which GDB
took to be correct. However, those comments didn't account for
alignment. This patch adjusts the offsets.
Next, the "FPU Saved field" is not a register -- it is an
implementation detail of the runtime. This is removed.
Finally, I think the FP registers are actually named V0-V31, and the
"Q" names are pseudo-registers. This patch fixes the comment.