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(parent: 76c4a3b) | patch
radeonsi: flush TC L2 cache for indirect draw data
authorNicolai Hähnle <nicolai.haehnle@amd.com>
Mon, 8 Aug 2016 15:06:22 +0000 (17:06 +0200)
committerNicolai Hähnle <nicolai.haehnle@amd.com>
Tue, 9 Aug 2016 13:56:03 +0000 (15:56 +0200)
commit2852dedaa0c45e426a53ba0042ecdb0f1b87950f
treecbb83e361477770537dd0c76aee69f4ec6b41016tree
parent76c4a3b567606d635c42809570a18089b4a41f9ccommit | diff
radeonsi: flush TC L2 cache for indirect draw data

This fixes a bug when indirect draw data is generated by transform
feedback.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
src/gallium/drivers/radeonsi/si_descriptors.c diff | blob | history
src/gallium/drivers/radeonsi/si_state_draw.c diff | blob | history