dev-arm: Add GICD_SGIR register
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Tue, 3 Sep 2019 09:45:40 +0000 (10:45 +0100)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Sat, 7 Sep 2019 12:12:55 +0000 (12:12 +0000)
commit286b6267afde29fcbe7d6aa3950ded6dba9eda1e
tree462a8a9396787fe6932b576d665465143b9f9685
parente87a293d1ffa6da38ba8fa145e7dc5128138ab77
dev-arm: Add GICD_SGIR register

The Distributor Software Generated Interrupt Register is implemented
only if affinity routing is disabled. Since this configuration is
currently not supported in gem5, it has to be treated as RES0.

Change-Id: I9ffcb31b26fc17547f74a4f1d43ce72c59786fa8
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20630
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
src/dev/arm/gic_v3_distributor.cc
src/dev/arm/gic_v3_distributor.hh