RISC-V: Update the riscv_opts.[rvc|rve] in the riscv_set_arch.
authorNelson Chu <nelson.chu@sifive.com>
Fri, 11 Jun 2021 09:23:43 +0000 (17:23 +0800)
committerNelson Chu <nelson.chu@sifive.com>
Fri, 11 Jun 2021 09:34:54 +0000 (17:34 +0800)
commit28b2963ffb4b55cbe720538040623f5c7ccb0a1b
treef242ee4bdc89e42a734f4160182f7ae02f8427e7
parent066f8fbede55e781c6241c445e0940f8368d0ef9
RISC-V: Update the riscv_opts.[rvc|rve] in the riscv_set_arch.

We also need to update the riscv_opts.[rvc|rve] for elf attributes.
Otherwise, the following case will fail,

$ cat cadd.s
.attribute arch, "rv64gc"
c.add   a0, a1
$ riscv64-unknown-elf-as cadd.s -o cadd.o
cadd.s: Assembler messages:
cadd.s:2: Error: illegal operands `c.add a0,a1

After applying this patch,

$ riscv64-unknown-elf-as cadd.s -o cadd.o
$ riscv64-unknown-elf-objdump -d cadd.o

cadd.o:     file format elf64-littleriscv

Disassembly of section .text:

0000000000000000 <.text>:
   0:   952e                    add     a0,a0,a1
        ...

gas/
    * config/tc-riscv.c (riscv_set_arch): Call riscv_set_rvc
    and riscv_set_rve both for -march and elf attributes.
    (riscv_after_parse_args): Likewise.
gas/ChangeLog
gas/config/tc-riscv.c