Wrap arrival functions inside `YOSYS too
authorEddie Hung <eddie@fpgeh.com>
Mon, 6 Jan 2020 19:55:56 +0000 (11:55 -0800)
committerEddie Hung <eddie@fpgeh.com>
Mon, 6 Jan 2020 19:55:56 +0000 (11:55 -0800)
commit28bf712372c494043c7adc0de904925a9199c939
tree89a8d64329d379fa113752361530626193f03e9c
parent27c150bfcc222512a0f3816e72ee20285acad9b4
Wrap arrival functions inside `YOSYS too
techlibs/xilinx/cells_sim.v