AVX-512. Extend ashrv insn patterns.

AVX-512. Extend ashrv insn patterns.

gcc/
	* config/i386/sse.md (define_mode_iterator VI248_AVX512BW_AVX512VL):
	New.
	(define_mode_iterator VI24_AVX512BW_1): Ditto.
	(define_insn "<mask_codefor>ashr<mode>3<mask_name>"): Ditto.
	(define_insn "<mask_codefor>ashrv2di3<mask_name>"): Ditto.
	(define_insn "ashr<VI248_AVX512BW_AVX512VL:mode>3<mask_name>"): Enable
	also for TARGET_AVX512VL.
	(define_expand "ashrv2di3"): Update to enable TARGET_AVX512VL.

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215262