arch-arm: Change disassemble when MSR to UNKNOWN register
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Wed, 18 Apr 2018 09:31:44 +0000 (10:31 +0100)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Thu, 19 Apr 2018 11:59:10 +0000 (11:59 +0000)
commit291c2798103999b66f9ad5b9a885a67f3ef2160e
treea30d447029aa72a47a215eee24df642faa146d36
parentce9d9c9a4c119131bdcfd774f1c2a2cf28e42db9
arch-arm: Change disassemble when MSR to UNKNOWN register

This patch changes the fault being thrown when MSR/MRS to an unknown
Misc register in AArch64. While previously the instruction was decoded
as an Unknown instruction (hence not printing any information), it is
now decoded as a FailUnimplemented and the unrecognized System register
numbers (CRn, op0...) are printed.

Change-Id: I205ff7adcde5934231c77e8d2250db69a34581fc
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10061
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
src/arch/arm/isa/formats/aarch64.isa