hdl.ir: allow ClockSignal and ResetSignal in ports.
authorwhitequark <whitequark@whitequark.org>
Sun, 13 Oct 2019 03:39:56 +0000 (03:39 +0000)
committerwhitequark <whitequark@whitequark.org>
Sun, 13 Oct 2019 03:39:56 +0000 (03:39 +0000)
commit29253295eea810a670a3d627be02ab14a692cfbb
tree30d0789ea525a8943a9c35461248d63fa2bc8d64
parent722b3879f4398b869ec05025c5af767c5a8a431f
hdl.ir: allow ClockSignal and ResetSignal in ports.

Fixes #248.
nmigen/hdl/ir.py
nmigen/hdl/xfrm.py
nmigen/test/test_hdl_ir.py