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(parent: 5d9f7f5) | patch
x86: slightly rework handling of some register-only insns
authorJan Beulich <jbeulich@suse.com>
Tue, 11 Jul 2023 06:20:17 +0000 (08:20 +0200)
committerJan Beulich <jbeulich@suse.com>
Tue, 11 Jul 2023 06:20:17 +0000 (08:20 +0200)
commit2ad525c286bfd1e9a3a654c37d689afdbcb2f7d5
tree883a6e3ecac817d9507cdce4143c02e92e3541c8tree
parent5d9f7f50992c5aad78e9b818211cf060fe2bbcc6commit | diff
x86: slightly rework handling of some register-only insns

Fold OP_MS() and OP_XS() into OP_R(), paralleling OP_M(). Use operand
names (largely) matching those in the SDM. For 128-bit-only forms use
Uxmm though, marking 256-bit forms as bad. This then allows no longer
going through vex_len_table[] for two of the insns.

Specifically _do not_ continue to mis-use v_mode.
opcodes/i386-dis-evex.h diff | blob | history
opcodes/i386-dis.c diff | blob | history