examples: add concise UART example.
authorwhitequark <whitequark@whitequark.org>
Thu, 27 Jun 2019 04:51:45 +0000 (04:51 +0000)
committerwhitequark <whitequark@whitequark.org>
Thu, 27 Jun 2019 04:51:45 +0000 (04:51 +0000)
commit2b92f120169c222c21430e25e055832d821eaf54
tree9994418c0cd72d3b72112f8dd87d40045ad7eb08
parent6f4e3156d81ada756435651f40ae4f74bb59072b
examples: add concise UART example.

This example uses shift registers and counters instead of an explicit
FSM, which makes it very compact in terms of generated logic, and
more concise too.
examples/basic/uart.py [new file with mode: 0644]