dev: Explicitly specify the endianness for packet accessors.
authorGabe Black <gabeblack@google.com>
Fri, 12 Oct 2018 12:06:26 +0000 (05:06 -0700)
committerGabe Black <gabeblack@google.com>
Wed, 17 Oct 2018 20:17:44 +0000 (20:17 +0000)
commit2bcb2b031d4419e87337b25936a09228955dc715
tree1da2953b4764a66bca23dfcf1656f4af205206d5
parent2701fcb2ffe76e2cb087807e87a9114d0009b7db
dev: Explicitly specify the endianness for packet accessors.

Generally speaking, the endianness of the data devices provide or
accept is dependent on the device and not the ISA the system
executes. This change makes the devices in dev pick an endianness
rather than using the guest's.

For the ISA bus and the UART, accesses are byte sized and so endianness
doesn't matter. The ISA and PCI busses and the devices which use them
are defined to be little endian.

Change-Id: Ib0aa70f192e1d6f3b886d9f3ad41ae03bddb583f
Reviewed-on: https://gem5-review.googlesource.com/c/13462
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
src/dev/i2c/bus.cc
src/dev/isa_fake.cc
src/dev/net/i8254xGBe.cc
src/dev/net/ns_gige.cc
src/dev/net/sinic.cc
src/dev/pci/copy_engine.cc
src/dev/pci/device.cc
src/dev/serial/uart8250.cc
src/dev/storage/ide_ctrl.cc
src/dev/virtio/pci.cc