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[AArch64] Fix atomic_cmp_exchange_zero_reg_1.c with +lse
authorKyrylo Tkachov <kyrylo.tkachov@arm.com>
Wed, 21 Jun 2017 15:26:21 +0000 (15:26 +0000)
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>
Wed, 21 Jun 2017 15:26:21 +0000 (15:26 +0000)
commit2c0113fd8ac55b9cf93c3a1c660264112edb0462
treeebce3ffc803a5a25133610f3f9eb8f3f68f1ba49tree
parent5e9d501c7db51bb2fdbb3678db4f74ee6b73e3b8commit | diff
[AArch64] Fix atomic_cmp_exchange_zero_reg_1.c with +lse

* config/aarch64/atomics.md (aarch64_compare_and_swap<mode>_lse,
SHORT): Relax operand 3 to aarch64_reg_or_zero and constraint to Z.
(aarch64_compare_and_swap<mode>_lse, GPI): Likewise.
(aarch64_atomic_cas<mode>, SHORT): Likewise for operand 2.
(aarch64_atomic_cas<mode>, GPI): Likewise.

From-SVN: r249457
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