wishbone/SRAM: fix non-32-bit bus
authorSebastien Bourdeauducq <sebastien@milkymist.org>
Mon, 26 Aug 2013 18:32:59 +0000 (20:32 +0200)
committerSebastien Bourdeauducq <sebastien@milkymist.org>
Mon, 26 Aug 2013 18:32:59 +0000 (20:32 +0200)
commit2cf6b6c768aafe9456a2043a5a0f2fdeabc878b4
tree801e99d4983c38fadc5595051c022f91eabfc280
parent33ca4d778f3afed22da941e75f17b252bea2f41c
wishbone/SRAM: fix non-32-bit bus
migen/bus/wishbone.py