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(parent: dd77848) | patch
arch-arm: Fix short descriptors cacheability during table walks
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Thu, 7 Nov 2019 09:45:01 +0000 (09:45 +0000)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Mon, 18 Nov 2019 09:45:55 +0000 (09:45 +0000)
commit2dd1842a67fe75c8705c1b9136f9d91defdc24cb
tree1cf50e62554fde2d17edd0b1106061a1e5a11df5tree
parentdd77848e2cddfaacf8105fd8d3110d708d41b125commit | diff
arch-arm: Fix short descriptors cacheability during table walks

This implies checking for the SCTLR.C bit TTBR1.IRGN0 bits.

Change-Id: I341faf85692ce2d2b4afd30a2f4aabac0e133192
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22724
Tested-by: kokoro <noreply+kokoro@google.com>
src/arch/arm/table_walker.cc diff | blob | history