fhdl/verilog: sort clock domains by name
authorSebastien Bourdeauducq <sebastien@milkymist.org>
Tue, 11 Sep 2012 08:00:03 +0000 (10:00 +0200)
committerSebastien Bourdeauducq <sebastien@milkymist.org>
Tue, 11 Sep 2012 08:00:03 +0000 (10:00 +0200)
commit2e14569b5c640d11e2b51a9aead9c1dfb134569e
tree5bb5a64f57dde9e5f07f45c2030f1b4dfe6e50eb
parent9a18a9df3fc842639f0c24d0634f67c6fb8ac3a9
fhdl/verilog: sort clock domains by name
migen/fhdl/verilog.py