Add DSP cascade tests
authorEddie Hung <eddie@fpgeh.com>
Mon, 23 Dec 2019 22:58:06 +0000 (14:58 -0800)
committerEddie Hung <eddie@fpgeh.com>
Mon, 23 Dec 2019 22:58:06 +0000 (14:58 -0800)
commit2e21aa59a296c666f8e8fa0033efce4504ebd9ba
treeb64d816a6ef0e80cd2933efae6f3f4bc78028266
parent1d0ac659ad37af7fa3d32a95bf04c4ce0e009792
Add DSP cascade tests
tests/arch/xilinx/dsp_cascade.ys [new file with mode: 0644]