ARM: fix value of MISCREG_CTR returned by readMiscReg()
authorAnthony Gutierrez <atgutier@umich.edu>
Fri, 27 Jul 2012 20:08:04 +0000 (16:08 -0400)
committerAnthony Gutierrez <atgutier@umich.edu>
Fri, 27 Jul 2012 20:08:04 +0000 (16:08 -0400)
commit2eb6b403c976c7909a065b70ef831f4a309455b3
tree5192c98afcfd97382862275edc452672b01d2308
parentae6ab7c03ca719b7ab000ee62538fc71dd0cf8df
ARM: fix value of MISCREG_CTR returned by readMiscReg()

According to the A15 TRM the value of this register is as follows (assuming 16 word = 64 byte lines)
[31:29] Format - b100 specifies v7
[28] RAZ - b0
[27:24] CWG log2(max writeback size #words) - 0x4 16 words
[23:20] ERG log2(max reservation size #words) - 0x4 16 words
[19:16] DminLine log2(smallest dcache line #words) - 0x4 16 words
[15:14] L1Ip L1 index/tagging policy - b11 specifies PIPT
[13:4] RAZ - b0000000000
[3:0] IminLine log2(smallest icache line #words) - 0x4 16 words
src/arch/arm/isa.cc
src/arch/arm/miscregs.hh