intel,nir: Lower TXD with a bindless sampler
authorJason Ekstrand <jason.ekstrand@intel.com>
Fri, 8 Feb 2019 23:56:52 +0000 (17:56 -0600)
committerJason Ekstrand <jason@jlekstrand.net>
Fri, 19 Apr 2019 19:56:42 +0000 (19:56 +0000)
commit2edf29b933564d4f1aae80b91f674f1175f91625
tree8ee215d444bad8228fa701f0cbbf839a3cde943d
parentbd56ce8ce5045a181b9fc8a7f24251931e343f9c
intel,nir: Lower TXD with a bindless sampler

When we have a bindless sampler, we need an instruction header.  Even in
SIMD8, this pushes the instruction over the sampler message size maximum
of 11 registers.  Instead, we have to lower TXD to TXL.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
src/compiler/nir/nir.h
src/compiler/nir/nir_lower_tex.c
src/intel/compiler/brw_nir.c