[libre-riscv-dev] minimum viable ASIC
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 8 May 2020 09:50:52 +0000 (10:50 +0100)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Fri, 8 May 2020 09:51:26 +0000 (10:51 +0100)
commit2f1a7c19bfbd6ff123227910bb6ca9a5d4a327ea
treef0dd9d2f5b8032c9e2e7fcbddbc3f74075737608
parentf57d78b7d1800a04e828828778285a181bde9d44
[libre-riscv-dev] minimum viable ASIC
65/caadd70093e4ac9e8cb7d606a0cc4e4d168324 [new file with mode: 0644]