fhdl: support inverted clock ports in instances
authorSebastien Bourdeauducq <sebastien@milkymist.org>
Sat, 22 Sep 2012 18:50:49 +0000 (20:50 +0200)
committerSebastien Bourdeauducq <sebastien@milkymist.org>
Sat, 22 Sep 2012 18:50:49 +0000 (20:50 +0200)
commit2fc9cae88a0b553268798c8004c13ed809d190f9
tree643782ecf803c28a3628e8b54212eae9a3179f9d
parent2e14569b5c640d11e2b51a9aead9c1dfb134569e
fhdl: support inverted clock ports in instances
migen/fhdl/structure.py
migen/fhdl/verilog.py