git.libre-soc.org Git - gem5.git/commit

author	Andreas Hansson <andreas.hansson@arm.com>
	Tue, 19 Feb 2013 10:56:07 +0000 (05:56 -0500)
committer	Andreas Hansson <andreas.hansson@arm.com>
	Tue, 19 Feb 2013 10:56:07 +0000 (05:56 -0500)
commit	319443d42dbed8d6b07b8a2b7a0e565ff5bd8abf
tree	49e9d2efb1b21b93cc825dbcbb2c906cbe71fa31	tree
parent	b44e0ce52b894fd4eecc9339e213b7a111c2cc1d	commit \| diff

scons: Add warning for missing declarations

This patch enables warnings for missing declarations. To avoid issues
with SWIG-generated code, the warning is only applied to non-SWIG
code.

43 files changed:

src/SConscript		diff \| blob \| history
src/arch/arm/isa/formats/misc.isa		diff \| blob \| history
src/arch/arm/isa/insts/m5ops.isa		diff \| blob \| history
src/arch/mips/isa/formats/control.isa		diff \| blob \| history
src/arch/mips/isa/formats/dsp.isa		diff \| blob \| history
src/arch/mips/isa/formats/fp.isa		diff \| blob \| history
src/arch/mips/isa/formats/mem.isa		diff \| blob \| history
src/arch/mips/isa/formats/mt.isa		diff \| blob \| history
src/arch/mips/isa/includes.isa		diff \| blob \| history
src/arch/sparc/faults.hh		diff \| blob \| history
src/arch/x86/bios/intelmp.hh		diff \| blob \| history
src/arch/x86/cpuid.hh		diff \| blob \| history
src/arch/x86/interrupts.hh		diff \| blob \| history
src/base/debug.cc		diff \| blob \| history
src/base/debug.hh		diff \| blob \| history
src/base/hostinfo.cc		diff \| blob \| history
src/base/hostinfo.hh		diff \| blob \| history
src/base/inet.hh		diff \| blob \| history
src/base/statistics.cc		diff \| blob \| history
src/base/statistics.hh		diff \| blob \| history
src/base/stats/text.hh		diff \| blob \| history
src/base/userinfo.cc		diff \| blob \| history
src/cpu/legiontrace.hh		diff \| blob \| history
src/cpu/pc_event.hh		diff \| blob \| history
src/dev/disk_image.hh		diff \| blob \| history
src/kern/tru64/dump_mbuf.cc		diff \| blob \| history
src/kern/tru64/printf.cc		diff \| blob \| history
src/mem/ruby/buffers/MessageBuffer.hh		diff \| blob \| history
src/mem/ruby/network/simple/PerfectSwitch.hh		diff \| blob \| history
src/mem/ruby/profiler/AddressProfiler.hh		diff \| blob \| history
src/mem/ruby/system/CacheMemory.hh		diff \| blob \| history
src/mem/ruby/system/RubyMemoryControl.hh		diff \| blob \| history
src/mem/ruby/system/WireBuffer.hh		diff \| blob \| history
src/python/swig/pyobject.cc		diff \| blob \| history
src/python/swig/pyobject.hh		diff \| blob \| history
src/sim/debug.hh		diff \| blob \| history
src/sim/drain.hh		diff \| blob \| history
src/sim/eventq.hh		diff \| blob \| history
src/sim/init.hh		diff \| blob \| history
src/sim/serialize.hh		diff \| blob \| history
src/sim/sim_object.hh		diff \| blob \| history
src/sim/stat_control.hh		diff \| blob \| history
src/sim/system.hh		diff \| blob \| history

RSS Atom