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(parent: f417725) | patch
vendor.fpga.lattice_ice40: enable SystemVerilog when reading .sv files.
authorwhitequark <whitequark@whitequark.org>
Mon, 3 Jun 2019 03:01:56 +0000 (03:01 +0000)
committerwhitequark <whitequark@whitequark.org>
Mon, 3 Jun 2019 03:01:56 +0000 (03:01 +0000)
commit3327deae92bfcbf78040cf3437c6ef6e1e82c067
tree69decce615ee3bf52175f47663affe9b7166790atree
parentf417725b10de30a1dbf0c6024bec316cccf685f9commit | diff
vendor.fpga.lattice_ice40: enable SystemVerilog when reading .sv files.
nmigen/vendor/fpga/lattice_ice40.py diff | blob | history