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(parent: 797b1bb) | patch
ram: Add block RAM pipelining
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>
Tue, 22 Oct 2019 05:05:18 +0000 (16:05 +1100)
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>
Wed, 30 Oct 2019 02:18:58 +0000 (13:18 +1100)
commit3349bdc79891364f702b8ce977d14abfda46ae01
treeaf89baec8cc184bfffac1382a6e89797f326122ftree
parent797b1bb045161cf33f3086cd464ae88ee3c7d2becommit | diff
ram: Add block RAM pipelining

This adds an output buffer to help with timing and allows the BRAMs
to actually pipeline.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
fpga/mw_soc_memory.vhdl diff | blob | history