Move SimObject python files alongside the C++ and fix
authorNathan Binkert <binkertn@umich.edu>
Mon, 28 May 2007 02:21:17 +0000 (19:21 -0700)
committerNathan Binkert <binkertn@umich.edu>
Mon, 28 May 2007 02:21:17 +0000 (19:21 -0700)
commit35147170f91ccbc73d3e75440a5301f758e54dfc
tree1a480271d5dd6c4a35e2bffc296c7de407e0fb2b
parent4f0f217c1b6a8c888ff8a1c60d1eb36cbdf14490
Move SimObject python files alongside the C++ and fix
the SConscript files so that only the objects that are
actually available in a given build are compiled in.
Remove a bunch of files that aren't used anymore.

--HG--
rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py
rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py
rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py
rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py
rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py
rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py
rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py
rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py
rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py
rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py
rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py
rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py
rename : src/python/m5/objects/Device.py => src/dev/Device.py
rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py
rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py
rename : src/python/m5/objects/Ide.py => src/dev/Ide.py
rename : src/python/m5/objects/Pci.py => src/dev/Pci.py
rename : src/python/m5/objects/Platform.py => src/dev/Platform.py
rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py
rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py
rename : src/python/m5/objects/Uart.py => src/dev/Uart.py
rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py
rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py
rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py
rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py
rename : src/python/m5/objects/Bus.py => src/mem/Bus.py
rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py
rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py
rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py
rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py
rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py
rename : src/python/m5/objects/Process.py => src/sim/Process.py
rename : src/python/m5/objects/Root.py => src/sim/Root.py
rename : src/python/m5/objects/System.py => src/sim/System.py
extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
91 files changed:
configs/common/FSConfig.py
src/arch/alpha/AlphaSystem.py [new file with mode: 0644]
src/arch/alpha/AlphaTLB.py [new file with mode: 0644]
src/arch/alpha/SConscript
src/arch/sparc/SConscript
src/arch/sparc/SparcSystem.py [new file with mode: 0644]
src/arch/sparc/SparcTLB.py [new file with mode: 0644]
src/cpu/BaseCPU.py [new file with mode: 0644]
src/cpu/FuncUnit.py [new file with mode: 0644]
src/cpu/IntrControl.py [new file with mode: 0644]
src/cpu/SConscript
src/cpu/memtest/MemTest.py [new file with mode: 0644]
src/cpu/memtest/SConscript
src/cpu/o3/FUPool.py [new file with mode: 0644]
src/cpu/o3/FuncUnitConfig.py [new file with mode: 0644]
src/cpu/o3/O3CPU.py [new file with mode: 0644]
src/cpu/o3/O3Checker.py [new file with mode: 0644]
src/cpu/o3/SConscript
src/cpu/ozone/OzoneCPU.py [new file with mode: 0644]
src/cpu/ozone/OzoneChecker.py [new file with mode: 0644]
src/cpu/ozone/SConscript
src/cpu/ozone/SimpleOzoneCPU.py [new file with mode: 0644]
src/cpu/simple/AtomicSimpleCPU.py [new file with mode: 0644]
src/cpu/simple/SConscript
src/cpu/simple/TimingSimpleCPU.py [new file with mode: 0644]
src/dev/BadDevice.py [new file with mode: 0644]
src/dev/Device.py [new file with mode: 0644]
src/dev/DiskImage.py [new file with mode: 0644]
src/dev/Ethernet.py [new file with mode: 0644]
src/dev/Ide.py [new file with mode: 0644]
src/dev/Pci.py [new file with mode: 0644]
src/dev/Platform.py [new file with mode: 0644]
src/dev/SConscript
src/dev/SimConsole.py [new file with mode: 0644]
src/dev/SimpleDisk.py [new file with mode: 0644]
src/dev/Uart.py [new file with mode: 0644]
src/dev/alpha/AlphaConsole.py [new file with mode: 0644]
src/dev/alpha/SConscript
src/dev/alpha/Tsunami.py [new file with mode: 0644]
src/dev/sparc/SConscript
src/dev/sparc/T1000.py [new file with mode: 0644]
src/mem/Bridge.py [new file with mode: 0644]
src/mem/Bus.py [new file with mode: 0644]
src/mem/MemObject.py [new file with mode: 0644]
src/mem/PhysicalMemory.py [new file with mode: 0644]
src/mem/SConscript
src/mem/cache/BaseCache.py [new file with mode: 0644]
src/mem/cache/SConscript
src/mem/cache/coherence/CoherenceProtocol.py [new file with mode: 0644]
src/mem/cache/coherence/SConscript
src/mem/cache/tags/Repl.py [new file with mode: 0644]
src/mem/cache/tags/SConscript
src/python/SConscript
src/python/m5/objects/AlphaConsole.py [deleted file]
src/python/m5/objects/AlphaTLB.py [deleted file]
src/python/m5/objects/BadDevice.py [deleted file]
src/python/m5/objects/BaseCPU.py [deleted file]
src/python/m5/objects/BaseCache.py [deleted file]
src/python/m5/objects/Bridge.py [deleted file]
src/python/m5/objects/Bus.py [deleted file]
src/python/m5/objects/CoherenceProtocol.py [deleted file]
src/python/m5/objects/Device.py [deleted file]
src/python/m5/objects/DiskImage.py [deleted file]
src/python/m5/objects/Ethernet.py [deleted file]
src/python/m5/objects/FUPool.py [deleted file]
src/python/m5/objects/FuncUnit.py [deleted file]
src/python/m5/objects/FuncUnitConfig.py [deleted file]
src/python/m5/objects/Ide.py [deleted file]
src/python/m5/objects/IntrControl.py [deleted file]
src/python/m5/objects/MemObject.py [deleted file]
src/python/m5/objects/MemTest.py [deleted file]
src/python/m5/objects/O3CPU.py [deleted file]
src/python/m5/objects/OzoneCPU.py [deleted file]
src/python/m5/objects/Pci.py [deleted file]
src/python/m5/objects/PhysicalMemory.py [deleted file]
src/python/m5/objects/Platform.py [deleted file]
src/python/m5/objects/Process.py [deleted file]
src/python/m5/objects/Repl.py [deleted file]
src/python/m5/objects/Root.py [deleted file]
src/python/m5/objects/SimConsole.py [deleted file]
src/python/m5/objects/SimpleDisk.py [deleted file]
src/python/m5/objects/SimpleOzoneCPU.py [deleted file]
src/python/m5/objects/SparcTLB.py [deleted file]
src/python/m5/objects/System.py [deleted file]
src/python/m5/objects/T1000.py [deleted file]
src/python/m5/objects/Tsunami.py [deleted file]
src/python/m5/objects/Uart.py [deleted file]
src/sim/Process.py [new file with mode: 0644]
src/sim/Root.py [new file with mode: 0644]
src/sim/SConscript
src/sim/System.py [new file with mode: 0644]