mem: Move crossbar default latencies to subclasses
authorAndreas Hansson <andreas.hansson@arm.com>
Mon, 2 Mar 2015 09:00:47 +0000 (04:00 -0500)
committerAndreas Hansson <andreas.hansson@arm.com>
Mon, 2 Mar 2015 09:00:47 +0000 (04:00 -0500)
commit36dc93a5fa09765b9d2bac402bb557d228effcad
tree3a0899247304a0800653f73f515617027ee8dba0
parentd35dd71ab4ac44a79ac22dca82277a43cd59f3c6
mem: Move crossbar default latencies to subclasses

This patch introduces a few subclasses to the CoherentXBar and
NoncoherentXBar to distinguish the different uses in the system. We
use the crossbar in a wide range of places: interfacing cores to the
L2, as a system interconnect, connecting I/O and peripherals,
etc. Needless to say, these crossbars have very different performance,
and the clock frequency alone is not enough to distinguish these
scenarios.

Instead of trying to capture every possible case, this patch
introduces dedicated subclasses for the three primary use-cases:
L2XBar, SystemXBar and IOXbar. More can be added if needed, and the
defaults can be overridden.
20 files changed:
configs/common/CacheConfig.py
configs/common/FSConfig.py
configs/dram/sweep.py
configs/example/memcheck.py
configs/example/memtest.py
configs/example/ruby_mem_test.py
configs/example/se.py
configs/ruby/Ruby.py
configs/splash2/cluster.py
configs/splash2/run.py
src/cpu/BaseCPU.py
src/mem/XBar.py
tests/configs/base_config.py
tests/configs/memtest-filter.py
tests/configs/memtest.py
tests/configs/o3-timing-mp-ruby.py
tests/configs/o3-timing-ruby.py
tests/configs/simple-atomic-mp-ruby.py
tests/configs/tgen-dram-ctrl.py
tests/configs/tgen-simple-mem.py