power: Add support for Radix Translation
authorPhanikiran Harithas <phanikiran.harithas@gmail.com>
Sun, 10 Jun 2018 12:15:05 +0000 (17:45 +0530)
committerKajol Jain <kajoljain797@gmail.com>
Wed, 12 Jun 2019 06:30:49 +0000 (12:00 +0530)
commit373f7af347628151d23e6a5f81ae280f686df1f2
tree01e396bb0057f65853d36289cf473a7403578a03
parent877e754b561134194b44e8e99913341dbc62bb1f
power: Add support for Radix Translation

Power ISA v3.0 introduces the Radix MMU in addition to the Hash MMU.

This patch adds support in gem5 for handling the Radix based address
translations when MSR[IR,DR] bits are set.

It also adds an example of a radix_walk.

Change-Id: I193f8d44f36b429997f7ffcb788a50544ba65a8c

Signed-off-by: Phanikiran Harithas <phanikiran.harithas@gmail.com>
Signed-off-by: Venkatnarayan Kulkarni <venkatnarayankulkarni@gmail.com>
Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
configs/common/Benchmarks.py
configs/common/FSConfig.py
src/arch/power/PowerTLB.py
src/arch/power/SConscript
src/arch/power/isa/decoder.isa
src/arch/power/radix_walk_example.txt [new file with mode: 0644]
src/arch/power/radixwalk.cc [new file with mode: 0644]
src/arch/power/radixwalk.hh [new file with mode: 0644]
src/arch/power/tlb.cc
src/arch/power/tlb.hh
src/cpu/BaseCPU.py