comp16-v1-skel: completed implementation of all opcodes
Added conditional register ops, system ops, 16-imm ops.
Implemented condition expression parsing, mop encoding,
accessors, and used them to implement 16-imm bc and bcl,
and 10- and 16-bit bclr and bclrl.
Extended imm(reg) memory addressing modes to recognize
situations that we can encode in 16-imm loads and stores.
Changed state machine to explicitly backtrack and count
occurrences of forced 10-bit nop followed by 16-imm,
followed by 32-bit.