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(parent: 909037b) | patch
radeon/vcn: add Sienna to use internal register offset
authorLeo Liu <leo.liu@amd.com>
Thu, 11 Jun 2020 22:40:07 +0000 (18:40 -0400)
committerLeo Liu <leo.liu@amd.com>
Thu, 18 Jun 2020 13:58:03 +0000 (09:58 -0400)
commit384195b041d077979d66af2a43dbcc800b1b75f9
tree9e129717d4ed01d6cc6c16c52015af64975ea66btree
parent909037b557cabbb267d470272d348ce2debd58d9commit | diff
radeon/vcn: add Sienna to use internal register offset

And re-group them explicitly

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>
src/gallium/drivers/radeon/radeon_vcn_dec.c diff | blob | history