git.libre-soc.org Git - gem5.git/commit

author	Steve Reinhardt <stever@gmail.com>
	Wed, 2 Jan 2008 20:20:15 +0000 (12:20 -0800)
committer	Steve Reinhardt <stever@gmail.com>
	Wed, 2 Jan 2008 20:20:15 +0000 (12:20 -0800)
commit	3952e41ab1f1dfaa2f97a6a486528e4ea0bfc5a1
tree	e186dc9429d37ea5e9ca6657ce746e60447dee32	tree
parent	659aef3eb8ff2803601851b85347fee04c2721b8	commit \| diff

Add functional PrintReq command for memory-system debugging.

--HG--
extra : convert_revision : 73b753e57c355b7e6873f047ddc8cb371c3136b7

23 files changed:

src/base/printable.hh	[new file with mode: 0644]	blob
src/cpu/memtest/memtest.cc		diff \| blob \| history
src/cpu/memtest/memtest.hh		diff \| blob \| history
src/cpu/o3/cpu.cc		diff \| blob \| history
src/mem/bridge.cc		diff \| blob \| history
src/mem/cache/SConscript		diff \| blob \| history
src/mem/cache/base_cache.cc		diff \| blob \| history
src/mem/cache/base_cache.hh		diff \| blob \| history
src/mem/cache/cache.hh		diff \| blob \| history
src/mem/cache/cache_blk.cc	[new file with mode: 0644]	blob
src/mem/cache/cache_blk.hh		diff \| blob \| history
src/mem/cache/cache_impl.hh		diff \| blob \| history
src/mem/cache/miss/mshr.cc		diff \| blob \| history
src/mem/cache/miss/mshr.hh		diff \| blob \| history
src/mem/cache/miss/mshr_queue.cc		diff \| blob \| history
src/mem/cache/miss/mshr_queue.hh		diff \| blob \| history
src/mem/packet.cc		diff \| blob \| history
src/mem/packet.hh		diff \| blob \| history
src/mem/physical.cc		diff \| blob \| history
src/mem/port.cc		diff \| blob \| history
src/mem/port.hh		diff \| blob \| history
src/sim/sim_object.cc		diff \| blob \| history
src/sim/sim_object.hh		diff \| blob \| history