git.libre-soc.org Git - gem5.git/commit

author	Ali Saidi <saidi@eecs.umich.edu>
	Wed, 10 Sep 2008 18:26:15 +0000 (14:26 -0400)
committer	Ali Saidi <saidi@eecs.umich.edu>
	Wed, 10 Sep 2008 18:26:15 +0000 (14:26 -0400)
commit	3a3e356f4e61e86f6f1427dd85cf1e41fa9125c0
tree	c9e147a14bcab9e4767ad13a00ac4a375044c441	tree
parent	09a8fb0b5263d4b41b8206ce075a3f6923907d65	commit \| diff

style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs

125 files changed:

configs/common/Benchmarks.py		diff \| blob \| history
src/arch/alpha/aout_machdep.h		diff \| blob \| history
src/arch/alpha/ev5.cc		diff \| blob \| history
src/arch/alpha/floatregfile.hh		diff \| blob \| history
src/arch/alpha/ipr.cc		diff \| blob \| history
src/arch/alpha/ipr.hh		diff \| blob \| history
src/arch/alpha/isa_traits.hh		diff \| blob \| history
src/arch/alpha/linux/linux.cc		diff \| blob \| history
src/arch/alpha/linux/linux.hh		diff \| blob \| history
src/arch/alpha/miscregfile.hh		diff \| blob \| history
src/arch/alpha/osfpal.cc		diff \| blob \| history
src/arch/alpha/pagetable.hh		diff \| blob \| history
src/arch/alpha/regfile.hh		diff \| blob \| history
src/arch/alpha/remote_gdb.cc		diff \| blob \| history
src/arch/alpha/system.cc		diff \| blob \| history
src/arch/alpha/tlb.cc		diff \| blob \| history
src/arch/alpha/tru64/process.cc		diff \| blob \| history
src/arch/alpha/tru64/tru64.cc		diff \| blob \| history
src/arch/alpha/tru64/tru64.hh		diff \| blob \| history
src/arch/isa_parser.py		diff \| blob \| history
src/arch/isa_specific.hh		diff \| blob \| history
src/arch/mips/isa_traits.hh		diff \| blob \| history
src/arch/mips/linux/linux.cc		diff \| blob \| history
src/arch/mips/linux/linux.hh		diff \| blob \| history
src/arch/mips/regfile/regfile.hh		diff \| blob \| history
src/arch/mips/system.cc		diff \| blob \| history
src/arch/mips/tlb.cc		diff \| blob \| history
src/arch/mips/tlb.hh		diff \| blob \| history
src/arch/sparc/isa_traits.hh		diff \| blob \| history
src/arch/sparc/linux/linux.cc		diff \| blob \| history
src/arch/sparc/linux/linux.hh		diff \| blob \| history
src/arch/sparc/miscregfile.hh		diff \| blob \| history
src/arch/sparc/regfile.hh		diff \| blob \| history
src/arch/sparc/remote_gdb.cc		diff \| blob \| history
src/arch/sparc/solaris/solaris.cc		diff \| blob \| history
src/arch/sparc/solaris/solaris.hh		diff \| blob \| history
src/arch/sparc/sparc_traits.hh		diff \| blob \| history
src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py		diff \| blob \| history
src/arch/x86/isa/insts/general_purpose/control_transfer/call.py		diff \| blob \| history
src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py		diff \| blob \| history
src/arch/x86/isa/insts/general_purpose/data_conversion/ascii_adjust.py		diff \| blob \| history
src/arch/x86/isa/insts/general_purpose/data_conversion/bcd_adjust.py		diff \| blob \| history
src/arch/x86/isa/insts/general_purpose/data_conversion/endian_conversion.py		diff \| blob \| history
src/arch/x86/isa/insts/general_purpose/data_conversion/extract_sign_mask.py		diff \| blob \| history
src/arch/x86/isa/insts/general_purpose/data_transfer/move.py		diff \| blob \| history
src/arch/x86/isa/insts/general_purpose/load_segment_registers.py		diff \| blob \| history
src/arch/x86/isa/insts/general_purpose/semaphores.py		diff \| blob \| history
src/arch/x86/isa/insts/general_purpose/system_calls.py		diff \| blob \| history
src/arch/x86/linux/linux.hh		diff \| blob \| history
src/arch/x86/remote_gdb.cc		diff \| blob \| history
src/base/bitunion.hh		diff \| blob \| history
src/base/crc.cc		diff \| blob \| history
src/base/fast_alloc.cc		diff \| blob \| history
src/base/fast_alloc.hh		diff \| blob \| history
src/base/inifile.hh		diff \| blob \| history
src/base/loader/aout_object.cc		diff \| blob \| history
src/base/loader/coff_sym.h		diff \| blob \| history
src/base/loader/coff_symconst.h		diff \| blob \| history
src/base/loader/ecoff_object.cc		diff \| blob \| history
src/base/loader/elf_object.cc		diff \| blob \| history
src/base/loader/hex_file.hh		diff \| blob \| history
src/base/loader/object_file.hh		diff \| blob \| history
src/base/loader/symtab.hh		diff \| blob \| history
src/base/remote_gdb.cc		diff \| blob \| history
src/base/res_list.hh		diff \| blob \| history
src/base/stats/flags.hh		diff \| blob \| history
src/base/stats/mysql.cc		diff \| blob \| history
src/base/time.hh		diff \| blob \| history
src/base/trace.hh		diff \| blob \| history
src/cpu/base_dyn_inst.hh		diff \| blob \| history
src/cpu/checker/cpu.hh		diff \| blob \| history
src/cpu/checker/cpu_impl.hh		diff \| blob \| history
src/cpu/memtest/memtest.hh		diff \| blob \| history
src/cpu/o3/alpha/dyn_inst.hh		diff \| blob \| history
src/cpu/o3/mips/dyn_inst.hh		diff \| blob \| history
src/cpu/o3/regfile.hh		diff \| blob \| history
src/cpu/ozone/back_end.hh		diff \| blob \| history
src/cpu/ozone/cpu_impl.hh		diff \| blob \| history
src/cpu/ozone/front_end.hh		diff \| blob \| history
src/cpu/ozone/inorder_back_end.hh		diff \| blob \| history
src/cpu/ozone/lsq_unit_impl.hh		diff \| blob \| history
src/cpu/ozone/lw_back_end.hh		diff \| blob \| history
src/cpu/simple/base.hh		diff \| blob \| history
src/cpu/simple_thread.cc		diff \| blob \| history
src/cpu/simple_thread.hh		diff \| blob \| history
src/cpu/static_inst.hh		diff \| blob \| history
src/dev/alpha/access.h		diff \| blob \| history
src/dev/etherdump.cc		diff \| blob \| history
src/dev/mips/access.h		diff \| blob \| history
src/dev/ns_gige.hh		diff \| blob \| history
src/dev/pcidev.cc		diff \| blob \| history
src/dev/pcireg.h		diff \| blob \| history
src/dev/sinicreg.hh		diff \| blob \| history
src/kern/linux/linux.hh		diff \| blob \| history
src/kern/operatingsystem.hh		diff \| blob \| history
src/kern/solaris/solaris.hh		diff \| blob \| history
src/kern/tru64/mbuf.hh		diff \| blob \| history
src/kern/tru64/tru64.hh		diff \| blob \| history
src/kern/tru64/tru64_syscalls.cc		diff \| blob \| history
src/mem/cache/blk.hh		diff \| blob \| history
src/mem/cache/builder.cc		diff \| blob \| history
src/mem/cache/prefetch/stride.cc		diff \| blob \| history
src/mem/cache/prefetch/stride.hh		diff \| blob \| history
src/mem/cache/tags/iic.cc		diff \| blob \| history
src/mem/cache/tags/lru.cc		diff \| blob \| history
src/mem/cache/tags/lru.hh		diff \| blob \| history
src/mem/cache/tags/split_lru.cc		diff \| blob \| history
src/mem/dram.cc		diff \| blob \| history
src/mem/physical.hh		diff \| blob \| history
src/mem/request.hh		diff \| blob \| history
src/python/m5/SimObject.py		diff \| blob \| history
src/sim/async.hh		diff \| blob \| history
src/sim/debug.cc		diff \| blob \| history
src/sim/eventq.hh		diff \| blob \| history
src/sim/host.hh		diff \| blob \| history
src/sim/insttracer.hh		diff \| blob \| history
src/sim/process.hh		diff \| blob \| history
src/sim/serialize.cc		diff \| blob \| history
src/sim/serialize.hh		diff \| blob \| history
src/sim/sim_events.hh		diff \| blob \| history
src/sim/syscall_emul.cc		diff \| blob \| history
src/sim/syscall_emul.hh		diff \| blob \| history
util/m5/m5op_alpha.S		diff \| blob \| history
util/m5/m5ops.h		diff \| blob \| history
util/term/term.c		diff \| blob \| history

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