build/sim: add Verilator FST tracing support.
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Thu, 20 Feb 2020 12:46:39 +0000 (13:46 +0100)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Thu, 20 Feb 2020 12:53:31 +0000 (13:53 +0100)
commit3a6f97fff3cedb3dbee90100839a1be7401ee9b4
tree2396affa7f40fa6b79753bc97af472d7f5e55b37
parent8a715f3b1208d272913c79a87612b246aab48658
build/sim: add Verilator FST tracing support.
litex/build/sim/core/Makefile
litex/build/sim/core/veril.cpp
litex/build/sim/verilator.py
litex/tools/litex_sim.py