projects / nmigen.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: b72c3fc) | patch
back.rtlil: don't emit wires for empty signals.
authorwhitequark <whitequark@whitequark.org>
Fri, 31 Jan 2020 03:38:58 +0000 (03:38 +0000)
committerwhitequark <whitequark@whitequark.org>
Fri, 31 Jan 2020 03:38:58 +0000 (03:38 +0000)
commit3ac13eb8f9a83b2a89587ce83b72c4966e9bad2e
tree08fa50d2c18b46f349b3a70ac35e1a895898777ftree
parentb72c3fc7f697442ccc0c0fc583fc7b70002b841ecommit | diff
back.rtlil: don't emit wires for empty signals.

Fixes #312.
nmigen/back/rtlil.py diff | blob | history