Share soc.vhdl between FPGA and sim
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>
Tue, 10 Sep 2019 15:40:11 +0000 (16:40 +0100)
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>
Tue, 10 Sep 2019 15:57:47 +0000 (16:57 +0100)
commit3ac1dbc737332ab5ea1e205ed55d8d62662e6b2d
treed6171e620e03a40972ae5ee83e2d2cea4782390c
parentd21ef5836d17e672751296eedb819a2b8884b0fd
Share soc.vhdl between FPGA and sim

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Makefile
core_tb.vhdl
fpga/soc.vhdl [deleted file]
fpga/toplevel.vhdl
microwatt.core
sim_uart.vhdl
simple_ram_behavioural.vhdl
simple_ram_behavioural_tb.vhdl
soc.vhdl [new file with mode: 0644]