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(parent: 90e2a99) | patch
back.pysim: reset timeline as well.
authorwhitequark <whitequark@whitequark.org>
Wed, 8 Jul 2020 07:12:00 +0000 (07:12 +0000)
committerwhitequark <whitequark@whitequark.org>
Wed, 8 Jul 2020 08:19:29 +0000 (08:19 +0000)
commit3c3cfd48fbc11fe94b87af613069fcb2dbf53cbd
tree468d7da25a178a6326b5a7ca6bb1335c10acb82ftree
parent90e2a991f0660a215995e94ec4083b7b0f080753commit | diff
back.pysim: reset timeline as well.

This is a bug that was introduced in 94faf497b.
nmigen/back/pysim.py diff | blob | history