arch-arm: AddressSize check on translateMmuOff for AArch64 only
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Tue, 14 Jul 2020 16:09:11 +0000 (17:09 +0100)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Wed, 15 Jul 2020 13:14:56 +0000 (13:14 +0000)
commit3ce7333a3619448a34bfb0c24f111e4473c3272c
treec6f1c9a3ec7ad55ae40b100bd03df0fb2787ed31
parent981bdda174ce64a2133bb0faf315d3bd91dc3539
arch-arm: AddressSize check on translateMmuOff for AArch64 only

Motivation:
An AddressSizeFault on AArch32 can only happen during a table walk
since the register used as a base by LD/ST is always 32 bit wide.
On AArch64 on the other hand, addresses can be 64bit wide;
when MMU is off (no virtual memory) an invalid physical address
can be specified

Change-Id: Id3ef170e99202c6b0b511fa7205c754956861720
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31274
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/arch/arm/tlb.cc