projects / yosys.git / commit
| author | Eddie Hung <eddie@fpgeh.com> | |
| Tue, 9 Apr 2019 21:33:37 +0000 (14:33 -0700) | ||
| committer | Eddie Hung <eddie@fpgeh.com> | |
| Tue, 9 Apr 2019 21:33:37 +0000 (14:33 -0700) | ||
| commit | 3e368593eb22d16de60c44ea721ca146082d3472 | |
| tree | 74765bfb250caf957e792e0f81b2fd0775d33cd3 | tree |
| parent | fd88ab5c834a45f4828a03fe7722b321e5f7c032 | commit | diff |
| techlibs/xilinx/Makefile.inc | diff | blob | history | |
| techlibs/xilinx/cells.lut | [new file with mode: 0644] | blob |