CPU: Separate out native trace into ISA (in)dependent code and SimObjects.
authorGabe Black <gblack@eecs.umich.edu>
Mon, 20 Jul 2009 06:54:56 +0000 (23:54 -0700)
committerGabe Black <gblack@eecs.umich.edu>
Mon, 20 Jul 2009 06:54:56 +0000 (23:54 -0700)
commit3e8e813218e7779a41bc12caae33db5e239506c9
tree289f443de0f36590952706257e633132573b1493
parenta3a795769a2590451731f683ba11110f4035ab6b
CPU: Separate out native trace into ISA (in)dependent code and SimObjects.

--HG--
rename : src/cpu/nativetrace.cc => src/arch/sparc/nativetrace.cc
rename : src/cpu/nativetrace.hh => src/arch/sparc/nativetrace.hh
rename : src/cpu/NativeTrace.py => src/arch/x86/X86NativeTrace.py
12 files changed:
src/arch/sparc/SConscript
src/arch/sparc/SparcNativeTrace.py [new file with mode: 0644]
src/arch/sparc/nativetrace.cc [new file with mode: 0644]
src/arch/sparc/nativetrace.hh [new file with mode: 0644]
src/arch/x86/SConscript
src/arch/x86/X86NativeTrace.py [new file with mode: 0644]
src/arch/x86/nativetrace.cc [new file with mode: 0644]
src/arch/x86/nativetrace.hh [new file with mode: 0644]
src/cpu/NativeTrace.py
src/cpu/SConscript
src/cpu/nativetrace.cc
src/cpu/nativetrace.hh